<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>GK110 on Dispatch3 Inc.</title><link>https://dispatch3.com/tags/gk110/</link><description>Recent content in GK110 on Dispatch3 Inc.</description><generator>Hugo -- gohugo.io</generator><language>en-us</language><lastBuildDate>Mon, 20 May 2013 00:00:00 -0400</lastBuildDate><atom:link href="https://dispatch3.com/tags/gk110/index.xml" rel="self" type="application/rss+xml"/><item><title>HotSort on an Overclocked Tesla K20C</title><link>https://dispatch3.com/posts/hotsort_oc_k20c/</link><pubDate>Mon, 20 May 2013 00:00:00 -0400</pubDate><guid>https://dispatch3.com/posts/hotsort_oc_k20c/</guid><description>A mysterious stranger just ran the HotSort benchmarking utility on an overclocked Tesla K20c and sent me the results.
The K20c was overclocked to 1058 MHz x 6.0 Gbps (GPU x MEM).
A stock K20c normally runs at 758 MHz x 5.2 Gbps.
The results are stunning!
You can see all the benchmarks here.</description></item><item><title>High Register-Count HotSort Kernels</title><link>https://dispatch3.com/posts/hotsort_gk110/</link><pubDate>Sun, 19 May 2013 00:00:00 -0400</pubDate><guid>https://dispatch3.com/posts/hotsort_gk110/</guid><description>Last week I returned to working on HotSort in order to add a few new features. One of the &amp;ldquo;free&amp;rdquo; features on my list was to implement high register-count merge kernels on GK110 and GT200 architectures.
The merge kernels in HotSort minimize global loads and stores by maximizing the number of element comparisons performed per thread.
Up until now, the same merging algorithm and register configurations were being used across all CUDA architectures and the resulting merge kernels were approaching the Fermi and GK104 63 register-per-thread limit.</description></item></channel></rss>