<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>GF100 on Dispatch3 Inc.</title><link>https://dispatch3.com/tags/gf100/</link><description>Recent content in GF100 on Dispatch3 Inc.</description><generator>Hugo -- gohugo.io</generator><language>en-us</language><lastBuildDate>Wed, 27 Jul 2011 00:00:00 -0400</lastBuildDate><atom:link href="https://dispatch3.com/tags/gf100/index.xml" rel="self" type="application/rss+xml"/><item><title>GPU Hack: High Lane Wins</title><link>https://dispatch3.com/posts/gpu_hack_high_lane_wins/</link><pubDate>Wed, 27 Jul 2011 00:00:00 -0400</pubDate><guid>https://dispatch3.com/posts/gpu_hack_high_lane_wins/</guid><description>A useful GF100 GPU hack is revealed on page 6 in the Laine &amp;amp; Karras' paper &amp;ldquo;High-Performance Software Rasterization on GPUs&amp;rdquo;.
They state that:
When there are shared memory write conflicts within the warp, the write from a thread on a higher lane, therefore containing a later triangle, will override a write from a thread on a lower lane, containing an earlier triangle. The CUDA programming guide explicitly leaves it undefined which thread will succeed in the write, but at least on GF100 the behavior is consistent and can be exploited.</description></item></channel></rss>